POEM-4 Payload Firmware

Context

Our student group at MIT-WPU built a payload that was hosted on POEM-4 — the orbital platform ISRO operates on the spent fourth stage of the PSLV. It launched aboard PSLV-C60 on December 30, 2024. I wrote the attitude-determination firmware that flew on it.

What I built

The firmware runs on an STM32H7 (ARM Cortex-M7) under FreeRTOS. The core is a deterministic state machine that fuses data from a MEMS IMU to estimate the payload’s attitude under hard real-time deadlines.

Around that core sits an interrupt-driven multi-protocol communication stack: UART for telemetry downlink, I2C for the sensor bus, and RS-485 for inter-board communication. All peripheral access is register-level, with volatile-safe concurrency between ISRs and tasks — the kind of code where a missing memory barrier shows up as a corrupted packet three layers up.

We worked directly from ISRO interface control documents and component datasheets. When the ICD says a line must behave a certain way at handover, there is no negotiating with it; the firmware conforms or the payload doesn’t fly.

Validation

Flight firmware doesn’t get a second chance, so validation was most of the work. I built Python tooling that simulated orbital conditions and replayed sensor data through the attitude pipeline before the hardware ever saw a test chamber. The attitude-determination stack reached 0.91 correlation against reference data.

The payload then went through the full space-qualification campaign: EMI/EMC, vibration, thermal-vacuum, and shock testing. Each campaign fed defects back into the firmware and the test scripts.

Result

The payload launched on December 30, 2024 and operated on the POEM-4 platform in low-Earth orbit. That firmware is my flight heritage: code I wrote, qualified, and argued over line by line, running in space.